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M494 single-chip voltage tuning system with 4 analog controls and m p interface june 1991 dip40 (plastic package) order code : M494b1 . non-volatile memory for 20 pro- gram words (17 bit x 20) - tuning voltage 12 bits - band 2 bits - multi standard 2 bits - program skip bit 1 bit - 10,000 modify cycles per word - min. 10 years data retention . 13 bit voltage synthesizer (brm + pwm) . nv memory for 4 analog controls (6 bit x 4) . 4 band switch outputs (vhf i & iii, uhf, catv) . 5 x 7 keyboard . 2 audio visual outputs (vcr & pc) . 2 coded multi standard outputs (e.g. pal, secam, ntsc etc.) . direct 1 1/2 digit 7 segment common anode led display driving . pcm remote control receiver (m708 transmitter) . 5-bit data input + control line for p interface . linear afc defeat output . flyback/sync. coincidence input for semi-automatic search . standby output . option select : 16 or 20 programs . power up mode . program skip defeat . av options . 1 * or decade mode option in 20 pro- gram option . temporary analog up/down indica- tor on led display . band skip option . 455 to 510khz cheap ceramic resonator . v dd =5v 5%. v pp = 25v 1v description the M494 is a monolithic lsi integrated circuit fabricated in sgs-thomson's epm2 process ; an n-channel, planox, double poly mos process ca- pable of including a floating gate nv memory cell (eeprom). the i.c. has been designed as a complete digital tv tuning system based on the voltage synthesis principle and as a replacement for all the conven- tional potentiometers and band switches particu- larly in low cost tv sets. it also provides some functions normally only associated with higher cost sets. nv memory is integrated on the chip together with all the necessary control circuitry to providethe program memory. separate nv memory is also integrated to provide the memory for four analog controls. a seven segment led display can be directly driven by the chip to display the program selected, and the direction of movement of the analog controls. provision is made for a remote control receiver both on and off chip, the latter is interfaced via a data input and single control line. (this enables control by a microprocessor). a local keyboard can be used with the device in a variety of configurations. an option select pin provides for different program number options, power up op- tions and skip associated functions. this device is another significant step towards the complete inte- gration of tv control circuitry. the device is packaged in a 40 pin dil plastic package. 1/22
1 2 3 4 5 6 7 8 9 10 11 12 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 13 14 15 16 17 18 19 20 24 23 22 21 d4 d3 d2 d1 d0 option select display drive h+i g f e d c b a av0 av1 memory timing v pp v ss v dd uhf catv vhf 1 vhf 3 osc. out osc. in tuning contrast ms 0 ms 1 brightness test 1 data handshake standby afc defeat fb/sync coincidence remote control volume saturation 494-01.eps pin connections absolute maximum ratings symbol parameter value unit v dd supply voltage 0.3 to 7 v v pp memory supply voltage 0.3 to 26 v v i input voltage 0.3 to 15 v v o(off) off state input voltage 15 v i ol output low current led driver outputs : pin a-g pin h + i all other outputs 20 35 5 ma ma ma t pd max. delay between memory timing & memory supply pulses 5 m s p tot total package power dissipation 1 w t stg storage temperature 25 to + 125 c t op operating temperature 0 to + 70 c c os capacitance on option select pin 100 pf r os resistance on option select pin 1 k w c dk capacitance on data outputs & keyboard inputs when lines are connected by a keyboard switch closure 150 pf r k series resistance of single keyboard switch 10 k w c rts capacitance on data handshake pin 50 pf stresses above those under oabsolute maximum ratingso may causes permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 494-01.tbl M494 2/22
static electrical characteristics (t amb =0to70 c, v dd = 5v unless otherwise specified) pins symbol parameter test conditions min. typ. max. unit memory supply i pp memory supply current v pp = 25v write peak write average erase peak erase average read peak read average 35 10 9 5 8 2.5 ma ma ma ma ma ma r pull down 25 k w memory timing v ol v dd = 4.75v, i ol = 2.5ma 8 v i o(off) leakage v dd = 4.75v, v o = 26v 100 m a tuning v ol v dd = 4.75v, i ol = 5ma 1 v v dd i dd supply current v dd = 5.25v 100 ma rc v i pk to pk 0.5 13.2 v fb/sync. coin. input v il 0.8 v v ih 2.0 v i il v dd = 5.25v, v il = 0.8v 0.4 ma r pull up 30 k w vol. brigh. sat. contr. dacs v ol v dd = 4.75v, i ol = 4ma 1 v i o(off) v dd = 5.25v, v o = 13.2v 50 m a h+i v il 1.5 v v ih 3.5 v i il v dd = 5.25v, v il = 1.5v 50 m a r pull up 200 k w v oh v dd = 4.75v, i ol = 30ma 1.5 v d0, d1 d2, d3 d4 v il 1.5 v v ih 3.5 v i il v dd = 5.25v, v il = 1.5v 0.4 ma v ol v dd = 4.75v, i ol = 1ma 0.4 v i o(off) v o(off) = 5.5v 25 m a r pull up 30 k w ms0, ms1 afc def. av0, av1 v ol v dd = 4.75v, i ol = 1ma 0.4 v i o(off) v dd = 5.25v, v o 13.2v 50 m a option select v il 1.5 v v ih 3.5 v i il v dd = 5.25v, v il = 1.5v 0.4 ma r pull up 30 k w standby v ol v dd = 4.75v, i ol = 100 m a 0.4 v i o v dd = 4.75v, v o = 0.7v 1.6 ma a, b, c, d, e, f, g v il 1.5 v v ih 3.5 v i il v dd = 5.25v, v il = 1.5v 50 m a r pull up 200 k w v ol v dd = 4.75v, i ol = 15ma 1.5 v display drive v ol v dd = 4.75v, i ol = 5ma 0.4 v i o(off) v dd = 5.25v, v o = 13.2v 50 m a uhf, iii, i, catv v ol v dd = 4.75v, i ol = 1ma 3 v v oh v dd = 4.75v, i oh = 150 m a 2.4 v v il 1.5 v v ih 3.5 v i o(off) v dd = 5.25v, v o = 13.2v 50 m a data handshake v ol v dd = 4.75v, i ol = 1ma 3 v v oh v dd = 4.75v, i oh = 150 m a 2.4 v v il 1.5 v v ih 3.5 v i il v dd = 5.25v, v il = 1.5v 0.4 ma r pull up 30 k w i o(off) v dd = 5.25v, v o = 13.2v 50 m a 494-02.tbl M494 3/22
definition of terms the M494 has four conditions or states that it can be in which are defined below. logic lo 0v and logic hi = 5v. powered down v dd =0v.v pp =0v on v dd =5v.v pp = 25v. device driving display normally. data handshake pin configured as rts i/p. standby o/p = hi. all other functions operating normally. standby v dd =5v.v pp =0v. device driving display to show a single static bar (g segment). data handshake pin configured as rts i/p. stanby o/p = lo. all keyboard commands are disabled except any program command on/off, on/stanby. memory sequence up or down, 1 * and 10 (dec- ade) commands. analog controls. tuning, av, ms and afc defeat o/p's = lo. band o/p's = hi (externally pulled up). see standby section for more detail. off v dd =5v.v pp = 0v. device not driving display. data handshake pin configured as off o/p. standby o/p = lo. display disabled and display drive o/p = hi (externally pulled up). all keyboard commands disabled except on/off. remote and data command sources disabled. analog controls, tuning, av, ms and afc defeat o/p's = hi (externally pulled up). functional description (clock frequency = 500khz) v dd &v ss v dd =+5v 5%. when applied, an internal power on reset of 110ms is generated. the voltage thresh- old for the reset is in the range 3 to 3.5v but is in fact the point at which the internal clock phases start. v ss = 0v. this pin is connected to the substrate of the i.c. and is the reference for all parameters of the device. oscillator i/o the frequency of the oscillator should be between 445 and 510khz using a cheap ceramic resonator. the reference frequency of the remote control transmitter must also be in the same range i.e. if the oscillator frequency is 455khz then the trans- mitter frequency could be 510khz or vice versa. test this pin is normally used for post fabrication testing purposes only and should be tied to v ss . however this pin can be used by sgs-thomson or the oem to enable external loading of the memory. details of how to achieve this can be furnished by sgs-thomson. remote control input the integrated rc receiver decodes signals trans- mitted by the m708 (address 10). the minimum signal amplitude should be 0.5v peak to peak at the input pin. the minimum pulse width should be 8 m s. the signal from the preamplifier (tda8160) is brought to the rc signal input via an ac coupling network (see figure 1). v dd (tda8160) r c 5v 2.2k w 4.7nf 12v 10k w 4.7nf rc tda8160 M494 494-02.eps figure 1 the input is self biased to approx. 1.5v. when a large signal is applied to the input a level shift will take place predominantly due to the coupling net- work. however another time constant is also visible due to the coupling c and the internal resistor r i . (see figures. 2 & 3). v remote control i/p to cct 1.5v ri dd 494-03.eps figure 2 M494 4/22
t 1 =rc t 2 =ri.c 1.5v 494-04.eps figure 3 functional description (continued) several tests are performed on the signal : a) measurement of the pulse distance t (time base synchronization). b) check of the bit positions relative to the time base windows. c) check of the parity bit. d) check of the absence of pulses between parity and stop pulses. e) check of the noise level. the receiver checks the noise level for a time t after each pulse detected. if all these tests are successful the received word is stored and decoded. if not it is rejected. the transmission is terminated on reception of the end of transmission (eot) code or if the internal timer measures a transmission interruption of more than 550ms. for more detail concerning the operation of the rc receiver refer to sgs-thomson tech- nical note no. 155 pp11-12. the rc receiver and the local keyboard have the same command source priority i.e. a local com- mand is not accepted until a previously accepted rc command has been completely executed and the eot code transmitted. similarly if a local com- mand is under execution then an rc command will not be accepted. the rc truth table and com- mands are shown on the next page. analog control outputs four analog control outputs are implemented to provide for volume, brightness, saturation and contrast from four 6 bit d/a's. these d/a's use the pulse width modulation technique to synthesize a pulse train of constant frequency but variable pulse width (pwm). each output delivers a 7.8khz square wave whose duty cycle is variable in 63 steps. external rc filtering and level shifting is required to realise a static dc voltage from the pulse train. if the analog outputs are continuously varied by command from the keyboard or data command sources the outputs will change approx. every 112ms (fck = 500khz) or approx. every 102ms if the command is issued from the rc command source. one analog control is specifi- cally designed asa volume control as mute circuitry is built in. on start up reset the analog control outputs except volume are enabled after a period of approx. 1.1 seconds. in the standby and off states all the analog control outputs are pulled to logic lo. the normalise command reads the contents of each analog memory sequentially to its corre- sponding counter and d/a output. tuning output the tuning voltage is generated from a 13 bit counter. the program memory stores the 12 msb's of the tuning word. the range of the afc circuitry is at least 3 bits so the lsb of the tuning counter does not affect the resolution of tuning. the contents of the counter are converted using a pwm and a bit rate multiplier (brm) technique. 13 bits gives 8192 steps which yields a resolution of approximately 3.9mv with a max. tuning voltage of 32v. this corresponds to a resolution of about 75khz in the uhf band. the 5 msb's of the tuning word are converted using pwm and the remaining 8 bits using brm. thus as the tuning word in- creases from all zeroes the number of pulsesin one period increases to 256 with all the pulses being the same length (t o =2 m s). for values larger then 256 pwm conversion takes place where the num- ber of pulses in one period stays constant at 256 but the width changes. when the pulse width reaches 15t o two successive pulses olinko together and the number of pulses decreases (see figure 4). the pulse train is fed to an external low pass filter to realise a dc voltage. the temperature depend- ence of this system is predominantly the switching times of the output pulses and as there are only a maximum of 256 pulses in one period the tempera- ture stability is very good. in standby and off states the tuning output is pulled to logic lo. 256 no of pulses tuning voltage 1v 31v 494-05.eps figure 4 M494 5/22
functional description (continued) table 1 : remote control commands (address 10, code = 1010) command number function code 16 programs 20 programs c1 c2 c3 c4 c5 c6 0 1 2 3 4 5 6 eot standby mute (toggle) program 1 program 2 program 3 program 4 eot standby mute (toggle) program 1 program 2 program 3 program 4 0 1 1 0 1 0 1 0 0 1 0 0 1 1 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7 8 9 10 11 12 contrast up contrast down program 5 program 6 program 7 program 8 contrast up contrast down program 5 program 6 program 7 program 8 1 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 1 1 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 13 14 15 16 17 18 memory seq. up memory seq. down program 9 program 10 program 11 program 12 memory seq. up memory seq. down program 9 program 0 10 (decade) + 10 (decade) 1 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 19 20 21 22 23 24 normalise on/stby (tog.) program 13 program 14 program 15 program 16 normalise on/stby (tog.) 1* nop nop nop 1 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 1 1 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 25 26 27 29 28 30 volume up volume down brightness up brightness down saturation up saturation down volume up volume down brightness up brightness down saturation up saturation down 1 1 0 0 1 1 0 1 0 1 0 1 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 the above table showns the difference between the 16 and 20 program options with respect to the remote control commands. commands 16, 17, 18 &21 change function between the two options. commands 22, 23 & 24 should not be used in the 20 program option, as they have no function. nop = no operation program memory nv memory (eeprom) is integrated on the chip to provide storage for up to 20 stations. each memory location is 17 bits in length providing 12 bits for tuning voltage, 2 bits for band, 2 bits for two coded multi-standard outputs and 1 bit pro- gram skip flag. individual program words canbe read on command from the keyboard, remote or data command sources but can only be written on command from the keyboard. there are two methods for storing a program (writ- ing the memory) : pre and post tuning selection of the program number. see commands, section 7. reading each memory location in sequence (up or down) can also be achieved from all the command sources. all memory timing functions are provided on chip and only one external transistor is required to switch the external memory supply (25v). there are essentially two operations carried out on the memory : write/modify and read. the write/modify cycle consists of 3 steps : a) all o1so are written to the bits of the addressed word. b) all bits of the word are erased. c) the new contents are written. using this method all the bits of the addressed word are aged the same. for more detail concerningthe write, erase and read current waveforms at the memory supply pin see m491 datasheet. memory for analog controls the memory for the analog controls is electrically identical to the main program memory but is organ- ised as four 6-bit words located in two sequentially addressed words at the memory. each word cor- responds to the volume, brightness, saturation and contrast outputs. at power on reset and nor- malise command each memory word is read out to its corresponding counter and d/a in sequence. M494 6/22
display scan decision d0 d1 d2 d3 d4 display drive 640 m s ( 2ms) mux period (8ms) initialize 494-06.eps figure 5 functional description (continued) display, keyboard and data multiplexing logic is integrated on the chip to provide the mul- tiplexing between the display, keyboard and data inputs. in the on state and with the data hand- shake pin at logic hi as an input the display and keyboard are muxed together. see figure 5. each column output goes to logic lo in sequence and the row inputs are scanned for a key closure. in chronological order across the total mux. period there is : initialisation, scan, decision and display periods. the data handshake pin has a complex logical function. it has two modes of operation : as a hand shake i/o line to a m p and as an output line to the p to signal that the M494 is in the off state. in order to achieve this function careful signal timing is required both internally and externally to the chip. see figure 6. when the device is in the off state the data handshake pin is used to signal this condition to the m p by being pulled lo. a1 b1 c1 d1 a2 b2 c2 d2 a3 data data o/i i/o o/i i/o (eot = end of transmission) k/b and rc i/p disabled till eot execytion data handshake d0 - d4 eoe (end of transmission) not to scale data handshake pin configuration t rts t cts t o/p t h t cr t s t j t hs t cr t o/p t cts 494-07.eps - 494-03.tbl figure 6 : data-input-timing n symbol parameter min. typ. max. unit 1t rts request to send pulse (rts) 5 10 m s 2t cts clear to send (cts) 512 m s 3t o/p pin output configuration 8 ms 4t hs handshake time 12 m s 5t s data set up time 10 128 m s 6t h data hold time 128 256 m s 7t j synchronization jitter 8 ms 8t cr cts to next rts pulse 98 ms note : oscillator clock = 500khz M494 7/22
functional description (continued) display the M494 is capable of directly driving a 1 digit common anode led display at the max. sink cur- rent of 15ma per segment. the h+i pin is capable of sinking a max. current of 30maso that these two segments can be driven from the same pin and be the same brightness as the other segments. on instruction from the internal command decoder the display shows programme number, direction of analog control movement, decade changeor mem- ory addressing function active. analog controls in this context are defined as tuning, volume, con- trast, saturation & brightness. the formats of the display for analog control direction, decade change and memory addressing are shown below respec- tively : for the analog controls the above condition is displayed with an ooverruno time of 300ms. i.e. the display will show the oarrowso for a period of 300ms after the release of any analog control up or down key. the memory addressing function display flashes at 5hz after the memory addressing function is commanded and continues to flash until a programme is selected or any other command is given. in 1 * the g segment only flashes at 5hz and continues to flash until a programme number is selected or any other command is given. if in memory addressing and 1 * is pressed then the display above is shown with segments g & d only flashing at 5hz until a programme number is se- lected or any other commands is given. when store or set skip flag commands are executed the whole display is flashed at 5hz for 1 second. keyboard it is possible to implement a keyboard with a max. size of 35 keys as a 5 x 7 array. fig. 8 shows the arrangement of the key matrix. each key connects a row (a-g) with a column (d0-d4) with a max. resistance of 10k w . de-bounce logic is integrated on the chip that only allows acceptance of a com- mand if the key is closed for longer than 40ms except for the on/standby and on/off commands where the relevant keys must be closed for approxi- mately 100ms. this is equivalent to 2 received rc commands). up down memory addressing |* i* and mem. addr. 494-08.eps for the main keyboard matrix (a-g x d0-d4), if the logic detects two keys closed simultaneously the display is blanked to indicate this condition to the user and no command is executed. when the logic detects only one key pressed the display will re-il- luminate and the command be executed. this avoids confusion as to which command should be executed and provides feed back to the user. for the option select line all options/commands can be active simultaneously. 1 * mode or decade mode can be selected on the option select line by the presence of a diode or not respectively. these two modes are only active for the 20 program option and are described below : in 1 * mode the display will toggle in & out of the condition shown in the display section. access to programs in the first decade is made by simply pressing any 0-9 program key and access to pro- grams in the second decade, whatever the current program is made by pressing 1 * followed by any 0-9 program key. in decade mode on pressing either 10 (decade) keys the display will light or extinguish the half digit respectively and simultaneously effect the tuning information. e.g. if the device is in program 3 press- ing + 10 (decade) key will give program 13 and then pressing - 10 (decade) key will give program 3. pressing - 10 (decade) again will have no effect. the 20 program option select acts like an enable for the 1 * or decade modes. i.e. the 1 * or decade modes are only selectable in the 20 program op- tion. in 16 program option the function of the 1* key, program key 0, -10 (decade) & + 10 (decade) are changed to no function, programme 10, 11 & 12 respectively. i.e. the difference between fig. 7 & 8 for those keys that change function. if the 1 * key is pressed followed by brightness up for example the device will increase the brightness only and reset the 1 * command i.e. the last command from any command source will al- ways be executed if it is a single keystroke command and the 1 * command will be reset by it. it is possible to press the 1 * key on the keyboard and then a program 0-9 command from rc or data command sources or vice versa. thus there are 2 methods of selecting a program from the keyboard for the 16 program option : direct access (only up to 12 programs) or memory sequence up/down. and there are 3 methods of selecting a program from the keyboard for the 20 program option : 1 * mode, decade mode and memory sequence up/down. M494 8/22
functional description (continued) M494 normalize contrast up store program on/standby (toggle) contrast down store analog values volume up brightness up tune up volume down brightness down tune down set skip flag on/off (toggle) band sequence saturation up memory sequence up ms sequence mute (toggle) saturation down memory sequence down memory addressing 1 2 3 4 8 9 10 11 5 6 7 12 p/u* off 16* av1* a b c d e f option select g av2 p/u standby skip off h+i d0 d1 d2 d3 d4 * = default p/u = power up 494-09.eps figure 7 : keyboard 16 programs M494 9/22
functional description (continued) M494 normalize contrast up store program on/standby (toggle) contrast down store analog values volume up brightness up tune up volume down brightness down tune down set skip flag on/off (toggle) band sequen ce saturation up memory sequence up ms sequen ce mute (toggle) saturation down memory sequence down memory address ing 1 2 3 4 8 9 5 6 7 p/u* off av1* a b c d e f option select g av2 p/u standby skip off h+i d0 d1 d2 d3 d4 0 -10 decade +10 decade 1* 20 decade* mode 1*mode * = default p/u = power up 494-10.eps figure 8 : keyboard 20 programs M494 10/22
functional description (continued) data input shown below are the codes for the commands : see table 2. the data input will accept signals whose timing is defined in figure 6 and electrical characteristics defined in the table of static electrical charac- teristics. the eot code must be transmitted after each command after a min. period of 112ms. band outputs four band outputs are provided for selection of the signal band : vhf i & iii, uhf and catv. band skip logic is implemented so that by tieing the relevant pin to v ss a band can be skipped in regions of no transmission in that band. the bands can be se- lected only in a rolling sequence by the band se- quence keyboard command. the sequence is as follows : vhf iii, uhf, vhf i, catv. multi standard outputs two coded multi standard outputs (or general pur- pose tv system flags) are provided so that the tv set can be designed for use in areas of more than one transmission standard. this function requires an external decoder to realise 4 different standards e.g. pal 1, pal 2, ntsc, secam etc. the multi standard sequence command available from the keyboard gives a simple binary count at the two outputs : 00, 01, 10, 11, 00 etc. in standby and off states the multistandard outputs are pulled to logic lo. table 2 : data commands command number function code 16 programs 20 programs d0 d1 d2 d3 d4 0 1 2 3 4 5 6 eot program 1 program 2 program 3 program 4 program 5 program 6 eot program 1 program 2 program 3 program 4 program 5 program 6 0 1 1 1 0 1 0 0 0 0 1 0 0 1 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7 8 9 10 11 12 program 7 program 8 program 9 program 10 program 11 program 12 program 7 program 8 program 9 program 0 10 (decade) + 10 (decade) 1 0 1 0 1 0 1 0 0 1 1 0 1 0 0 0 0 1 0 1 1 1 1 1 0 0 0 0 0 0 13 14 15 16 17 18 program 13 program 14 program 15 program 16 normalise volume up 1* nop nop nop normalise volume up 1 0 1 0 1 0 0 1 1 0 0 1 1 1 1 0 0 0 1 1 1 0 0 0 0 0 0 1 1 1 19 20 21 22 23 24 volume down contrast up contrast down brightness up brightness down saturation up volume down contrast up contrast down brightness up brightness down saturation up 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 1 1 0 0 0 0 0 0 1 1 1 1 1 1 1 25 26 27 28 29 30 saturation down memory seq. up. memory seq. down on/standby (toggle) standby mute (toggle) saturation down memory seq. up. memory seq. down on/standby (toggle) standby mute (toggle) 1 0 1 0 1 0 0 1 1 0 0 1 0 0 0 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 no transmission (pulled up) 1 1 1 1 the above table shown the difference between the 16 and 20 program options with respect to the data input commands. commands 10, 11, 12 & 13 change function between the two options. commands 14, 15 & 16 should not be used in the 20 program option, as they have no function. nop = no operation. M494 11/22
functional description (continued) audio visual outputs two audio visual outputs are provided for automat- ic selection of a vcr and/or personal computer. the logicstate of the pins dependson the av option selected, the program option and the program number selected according to the truth tables be- low : table 3 : av option 1 (16/20 programs) program av0 av1 16/0 15/19 others 1 0 0 0 1 0 table 4 : av option 2 (16/20 programs) program av0 av1 8/8 7/7 6/6 others 1 0 1 0 0 1 1 0 external pull up resistors must be used to realise a logic hi as the outputs are open drain transistors. see i/o configuration. afc defeat output the afc defeat output is a ttl compatible signal that is capable of switching the afc circuitry in and out. the afc defeat output is pulled lo on any program change including memory sequence up and down and is held lo for 500ms after execution of the command. when tune up or down are com- manded the afc defeat output is taken to logic lo. after the tuning operation the afc defeat is held lo for 1 second after the key is released (see figure 9). on power on & start up resets it is taken to logic lo for approx. 1.1 seconds. afc defe at output tune up/do wn : keyed released 1s 494-11.eps figure 9 standby the standby output is a push pull output capable of directly driving an npn transistor for switching a relay. the states of this pin are defined in the definition of terms. when standby is commanded, available from all command sources as standby or on/standby commands, the standby output is en- abled. if the device goes into standby from on then any program command will bring the device on with that program selected. on/off command from key- board only will execute the off function. on/standby, memory sequence up or down, 1 * and 10 (decade) commands from any command source will bring the device on in the program selected before standby with the display showing that program only, i.e. the device executes an on command only. if the device goes into standby from powered down then the on/off command from keyboard only and any program command, on/standby, memory se- quence up or down, 1 * and 10 (decade) com- mands from any command source will bring the device on in program 1. i.e. the device executes an on command only. option select the option select pin provides an extra line that performs a ohard wired keyboard functiono in con- junction with the keyboard scanning lines d0-d4. this line has integrated logic associated with it that enables one or many of the functions to be active simultaneously. in contrast, the keyboard inputs a-g will allow one key active at any given time. see keyboard section. various options can be selected by the connection or not of a diode as shown in figures 7 & 8. from left to right along the option select line col- umn 1 selects the number of programs. a diode connected here selects 20 programs (full comple- ment) and no diode (default) selects 16 programs only that can be accessed. the 20 program option only enables selection of 1 * or decade modes in column 4. in column 2 the av option defines the state of the av outputs for two protocols. these are described in section audio visual output. column 3 defines the state the M494 powers up in. if no connection of a diode (default) is made here the device powers up in the off state. if a diode is present then the device powers up in the standby state. in column 4, activated by the 20 program option only, the presence of a diode places the device in 1 * mode and the absence of a diode selects decade mode. the diode and switch in column 5 defeats the skip condition and enables program memory words to be read with the skip flag set. this allows programming (or reprogramming) of previously skipped words. M494 12/22
functional description (continued) skip function program skip is implemented in the M494 by a single memory bit associated with each program word. the bit acts as a flag to the device to indicate that the program word should be skipped and the next program word read from the memory in as- cending or descending order if the skip flag is set. programs are skipped only when accessed using the memory sequence up/down commands. direct access to a program from the keyboard, rc or data command sources will always override the skip function. e.g. if skip is set on prog. 7 and prog. 7 is commanded from rc then prog. 7 will be tuned even if there is nc prog. stored in that memory location. in order to program the skip bit and to defeat its function when required two commands are avail- able : set skip flag and skip defeat. the skip defeat switch is designed to be activated by a facia panel on the tv set under which are infrequently used controls. on the set skip flag command the M494 stores the current contents of the tuning, band and ms count- ers and sets the skip bit. after the set skip flag operation the contents of the tuning, band and ms counters will not change and the device continues to output these values. the operation is transpar- ent to the user in terms of function but is indicated on the display by the program number flashing at 5hz for 1 second. in order to reset the skip bit for any program word the desired program should be selected with skip defeated. a station should then be tuned, if required, and then the store command issued. the store command automatically resets the skip flag. the skip defeat command enables the reading and writing (plus resetting of skip flag) of memory words whose skip flag is set. if skip is defeated the device will only access the number of programs selected by the option select i.e. if 16 programs only are selected then skip defeat will not enable access to all 20 programs. reset there are two conditions under which the M494 is reset : power on and start up (on command). power on reset is triggered whenever v dd falls below about 3v. the duration of this reset is 110ms after v dd has been restored. power on reset (powered down to off or standby states) after the reset period of 110ms : a) the program counter is set to program 1. b) the outputs are disabled as defined in the off and standby states. see standby & off definitions. c) the option selection, keyboard, momentary on switch and, when in standby, the display, rc and data inputs become active. for the oactivity levelo of the keyboard in off and standby states. see standby & off definitions. d) an internal register is set to indicate that the device has powered up from the powered down state. start up reset (standby or off states to on state) a start up reset is instigated by the reception of the commands given in the definition of terms or the standby section. the following then occurs : a) the internal register indicating that the device has powered up from the powered down state is read : i) if the register is set than the memory word addressed by the program counter is loaded into the tuning counter and then the analog values are read rom the memory. ii) if the register is reset then the previously selected tuning and analog values are left unchanged. b) the afc is defeated and the volume muted for a period of approx 1.7 seconds or 0.6 seconds longer than the other analog outputs. c) the tuning and analogue outputs, except volume, are enabled after approx. 1.1 seconds. d) the volume output is enabled after 1.7 seconds e) the standby output is pulled up internally to logic hi f) the internal register is reset. if the device has either of the power up options (power up in off or standby states) selected then it will perform a power up reset but all the outputs and command sources will remain disabled, then on the on command, a start up reset will be performed. if the device is required to power up in the on state using the momentary mechanical switch con- nected to the h+i pin then it will perform an ordinary power on reset followed immediately by a start up reset. the outputs and command sources will be enabled after the periods defined above. M494 13/22
functional description (continued) manual tuning manual tuning commands tune up or down, are available from keyboard only and are provided to allow both manual station search and tuning adjustments. if a continuous tuning up or down command is made from the keyboard the speed of movement of the tuning counter is as shown in fig. 10 for the uhf and catv bands. time t o is the start time for the key being pressed. when the fb/sync. coincidence input is a logic hi the tuning speed is reduced to 16 steps/sec. if, at time t o the fb/sync. coincidence input is at logic lo than the tuning.sweep speed jumps immediately to 512 steps/sec. for vhf iii & i all these levels are shifted up by a factor of 2 & 4 respectively giving slowest speeds of 8 steps/sec. and 16 steps/sec. and highest speeds of 1024 steps/sec and 2048 steps/sec. if the continuity of command is broken by releasing the keyboard for example then the tuning speed returns to its slowest speed when the fb/sync. coincidence input is at logic hi. if the upper or lower limit of a band is reached during manual tuning then tuning will continue in the same direction from the opposite limit after a 480ms delay to allow for the discharge of the external network. the tuning counter is 13 bits in length giving a range of 8192 steps. the uhf band has a band- width of approx. 400mhz. thus in the uhf band the slowest speed of 4 steps/sec. gives a tuning speed of about 200khz/sec. the fastest speed of 512 step/sec. corresponds to a total band sweep time of 16 seconds. program memory sequence a continuous up/down program memory command from keyboard produces a program change every 500ms. from remote control and data command sources a continuous program memory sequence command produces a program change approx. every 500ms or every 5 received commands. a memory sequence up or down command issued from any source will bring the device out of standby to the program selected before standby was com- manded. the memory sequence up or down will not then commence until the command is stopped and reissued from any source (until an eot has been received or internally generated). 512 4 8 16 32 fb/sync. coincidence fb/sync. coincidence fb/sync. coincidence time (sec) t0123 tuning sweep speed (step/sec) 494-12.eps figure 10 : tuning sweep speed (uhf & catv bands) M494 14/22
functional description (continued) mute the sound mute function is available as a toggle command from all command sources. there are other commands and functions during which the sound is muted : - fb/sync. coincidence - if there is no fb/sync. coincidence under any conditions the sound is muted. - start up reset - the sound is muted for approx. 1.7 seconds. - program change - the sound is muted for 0.6 seconds on any program change ; direct, 1 * + 0-9 program (only after the second keystroke), 10 (decade) & memory sequence up/down con- tinuous or single keystrokes. - standby & off states - the sound is muted. - band sequence - same as program change. the sound is demuted under the following condi- tions : - when the mute command is received from any source. - when the device is commanded on from standby of off, i.e. if the device was muted when the standby command was issued then when on is commanded it will always start up with the sound demuted after the reset and settling period of approx. 17 seconds. - volume up - if volume up is commanded whilst the sound is muted then the volume will increase from zero. - volume down - if volume down is commanded whilst the sound is muted then there is no effect. - any program change - the sound is not de- muted. momentary on switch provision is made for a momentary switch con- nected between the h+i pin and ground to force the M494 to make power on and start up resets auto- matically so that the device attains the on state immediately. the condition of the h+i pin is latched after the reset period of 110ms. therefore the period of switch contact closure should be a min. of 120ms. figures. 11 & 12 respectively show in flow diagram form the two methods for storing a station : pretun- ing program selection and post tuning program selection. figures. 13, 14 & 15 show the select programme subroutine for figures. 11 & 12 for either 16 program option or 20 program option with 1*or 10 (decade modes). M494 15/22
commands command source function programs 1-12 kb, d,rc (16 opt.) reads the contents of the memory location : 2msb's to the ms counter, next 2 msb's to the band counter next 12 msb's to the tuning counter and d/a and lsb to skip flag register. initiates an on command only after standby. programs 0-9 kb, d, rc (20 opt.) reads the contents of the memory location : 2msb's to the ms counter, next 2 msb's to the band counter next 12 msb's to the tuning counter and d/a and lsb to skip flag register. initiates an on command only after stndby. programs 13-16 d, rc (16 opt.) reads the contents of the memory location : 2 msb's to the ms counter, next 2 msb's to the band counter next 12 msb's to the tuning counter and d/a and lsb to skip flag register. initiates a on command only after standby. 10 (decade) kb, d, rc (20 opt.) sustracts 10 from the current program (if possible). initiates an on command only after standby. + 10 (decade) kb, d, rc, (20 opt.) adds 10 to the current program (if possible). initiates an on command only after standby. 1* kb, d, rc (20 opt.) commands the M494 to wait for a 0-9 program command or to reset on any other command. display shows half digit and g segment flashing at 5hz. initiates an on command only after standby. vol. up/down bri. up/down sat. up/down con. up/down kb, d, rc increments up or down the relevant analog control counter every keystrobe or continuously every 112ms from kb and every 102ms from the rc and data inputs. the display shows an up/down arrow for 300ms min. tune up/down kb increments up or down the tuning counter. the speed or increment/decrement is defined by figure 10. the display shows an up/down arrow for 300ms min. mem. up/down kb, d, rc the program number (memory location) is incremented/decremented. mute (toggle) kb, d, rc volume mute. see mute section. standby d, rc commands the standby state. on/standby (toggle) kb, d, rc commands the standby state from the on state and the on state from the standby state. on/off kb commands the on state when in the off state and commands the off state when in the on state. see standby section. store program kb the currently addressed memory location is written from the tuning, band and ms counters and the skip flag is reset. see fig. 11. execution of this command is indicated by the display flashing at 5hz for 1 second. store analog controls kb the analog control memories are written in sequence from the analog control counters. execution of this command is indicated by the display flashing at 5hz for 1 second. band sequence kb command the next band in the sequence as defined in bands outputs section. one step for each key strobe. ms sequence kb increments the ms counter by binary one. one step for each key strobe. normalise analog kb, d, rc reads the analog memories in sequence to their corresponding d/a's. the analog control outputs are disabled during the read sequence. memory addressing kb strobes the program selected immediately after the memory addressing command (post tuning program selection). see figure 12. set skip flag kb sets the skip flag on the currently selected program. execution of this command is indicated by the display flashing at 5hz for 1 second. skip defeat os defeats the function of the skip bit to allow reading and writing of the currently selected program. kb = keyboard; d = data; rc = remove control; os = option select. figures 11 & 12 respectively show in flow diagram from the two methods for storing a station : pretun- ing program selection and post tuning program selection. figures 13, 14 & 15 show the select program subroutine for figures 11 & 12 for either 16 pro- gram option or 20 program option with 1* or 10 (decade modes). M494 16/22
commands (continued) set skip flag & store select program tune up/down store begin end end set skip flag at current programme ? continue ? yes no no yes no yes selected programme no. flashes at 5hz for 1 second station tuned ? 494-19.eps figure 11 : normal methods for storing a station (preselection of program number) M494 17/22
commands (continued) memory addressing set skip flag & store store begin end set skip flag at current programme ? continue ? yes no station tuned ? time up/down select programme (direct only) end store station at current programme ? yes no yes no no yes this display flashes at 5hz until a programme selection is completed or any other command is given selected programme no. flashes at 5hz for 1 second 494-20.eps figure 12 : secondary method for storing a station (postselection of program number) begin end yes no select number memory sequence end key present for desired programme? up or down to desired programme 494-21.eps figure 13 : program selection routine (16 program) M494 18/22
commands (continued) begin yes no end select 1* select program upper decade ? select 1* again (toggle) select program end no yes previous programme number is displayed g segment flashes at 5hz until a program is selected or any other command is given correct ? 494-22.eps figure 14 : program selection routine (20 program, 1 * mode) begin yes no end select program select + or - decade select program if necessary end change decade ? 494-23.eps figure 15 : program selection routine (20 program, decade mode) M494 19/22
osc. out osc. in 494-13.eps figure 16 st andby output 494-14.eps figure 17 fb/sync coincidence option select 494-15.eps figure 18 band 494-16.eps figure 19 vol, bri, sat, con, tuning mem. timing, afc defeat ms, display drive 494-17.eps figure 20 d0 - d4, a-g, h+i, av data handshake 494-18.eps figure 21 input/output pins M494 20/22
r18 5.6k w c7 10 m f vol r20 5.6k w c8 10 m f r24 5.6k w c9 10 m f c10 10 m f r17 22k w r19 22k w r22 5.6k w r21 22k w r23 22k w sat lum con 27 34 33 31 28 r25 8.2k w 24 r26 8.2k w r27 8.2k w r28 8.2k w 23 22 21 r29 10k w r30 10k w t6 bc177 t7 bc177 r31 10k w r32 10k w t8 bc177 t9 bc177 vhf i vhf iii catv uhf r35 680 w dl4 dl3 dl2 dl1 r33 r34 18 17 r10 1.5k w +12v +5v 39 19 20 r5 6.8k w r6 4.7k w c1 22 m f t3 bc297 r7 82k w r9 5.6k w 1% t4 bf259 35 7 r3 680 w r4 1k w t2 bc177 relay +5/12v z1 taa550 c2 100nf r1 r2 r13 33k w r14 33k w c4 150nf r15 56k w r16 82k w c6 100nf c5 100nf r12 3.3k w r11 3.9k w t5 bsx93 high voltage r39 2.2k w 4.7nf tuning voltage 16 store prog 15 store analog 14 tune up 13 tune down 11 band seq 10 prg up 9 prg down 6 8 5 4 3 2 1 d4 d5 d3 d5 d2 d5 d1 d5 d0 d5 a b c d e f g h i 25 40 26 12 32 36 37 r36 5.6k w afc def out fb sync +5v av0 av1 c12 100nf osc c11 100nf 29 30 2 x 5.6k w r38 r37 ms1 ms0 M494 b c e f h i a d tda8160 +5v m708 500khz r8 1.6k w 1% 2 x 5.6k w 38 r1 (k w )= v h (v) - 33v 11ma r2 = r1/4 494-24.eps typical application M494 21/22
information furnished is believed to be accurate and reliable. however, sgs-thomson microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no licence is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specifications mentioned in this publication are subject to change without noti ce. this publication supersedes and replaces all information previously supplied. sgs-thomson microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of sgs-thomson microelectronics. ? 1995 sgs-thomson microelectronics - all rights reserved purchase of i 2 c components of sgs-thomson microelectronics, conveys a license under the philips i 2 c patent. rights to use these components in a i 2 c system, is granted provided that the system confo rms to the i 2 c standard specifications as defined by philips. sgs-thomson microelectronics group of companies australia - brazil - china - france - germany - hong kong - italy - japan - korea - malaysia - malta - morocco the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. pm-dip40.eps package mechanical data 40 pins - plastic package dimensions millimeters inches min. typ. max. min. typ. max. a1 0.63 0.025 b 0.45 0.018 b1 0.23 0.31 0.009 0.012 b2 1.27 0.050 d 52.58 2.070 e 15.2 16.68 0.598 0.657 e 2.54 0.100 e3 48.26 1.900 f 14.1 0.555 i 4.445 0.175 l 3.3 0.130 M494 22/22

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